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dc.contributor.authorTANNER, P
dc.contributor.authorDIMITRIJEV, S
dc.contributor.authorHARRISON, HB
dc.date.accessioned2019-12-10T05:58:25Z
dc.date.available2019-12-10T05:58:25Z
dc.date.issued1995
dc.identifier.issn0013-5194
dc.identifier.urihttp://hdl.handle.net/10072/120209
dc.description.abstractA new experimental technique presented in the Letter simultaneously extracts the trap response time as well as trap density and energy in the silicon bandgap. The technique is illustrated by measuring the trap density increase in a MOS capacitor due to constant current stressing and is compared with the results obtained using the conventional quasistatic C/V technique.
dc.description.peerreviewedYes
dc.languageEnglish
dc.language.isoeng
dc.publisherIEE
dc.publisher.placeUK
dc.relation.ispartofpagefrom1880
dc.relation.ispartofpageto1881
dc.relation.ispartofissue21
dc.relation.ispartofjournalElectronics Letters
dc.relation.ispartofvolume31
dc.subject.fieldofresearchBiological sciences
dc.subject.fieldofresearchCommunications engineering
dc.subject.fieldofresearchElectronics, sensors and digital hardware
dc.subject.fieldofresearchcode31
dc.subject.fieldofresearchcode4006
dc.subject.fieldofresearchcode4009
dc.titleTechnique for Monitoring Slow Interface Trap Characteristics in MOS Capacitors
dc.typeJournal article
dc.type.descriptionC1 - Articles
dc.type.codeC - Journal Articles
gro.facultyGriffith Sciences, Griffith School of Engineering
gro.hasfulltextNo Full Text
gro.griffith.authorHarrison, Barry B.
gro.griffith.authorDimitrijev, Sima
gro.griffith.authorTanner, Philip G.


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