The effects of process induced gate-to-source/drain junction separation in MOSFET structures

Abstract

As device size decreases, the effect of process fluctuations on the device structure and performance will become more apparent. Implantation, annealing and etching fluctuations can lead to a separation between the edge of the gate and the source/drain extensions. This paper investigates the effect of separation on the device characteristics of 1.5 μm mask gate length MOSFETs. It was found that introducing separation reduced the overall peak substrate current, increased the breakdown voltage, increased the hot carrier hardness and greatly increased the device's lifetime. However, separation also increased the threshold voltage and reduced the drain current. The separation was found not to contribute any extra parasitic resistance but manifested itself as an increase in the effective electrical channel length. Varying the amount of separation demonstrated that the input capacitance was reduced, and that the speed was increased relative to a standard LDD MOSFET.