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dc.contributor.authorWang, T
dc.contributor.authorSun, J
dc.contributor.authorWang, X
dc.contributor.authorLiu, Y
dc.contributor.authorSi, Y
dc.contributor.authorDong, JS
dc.contributor.authorYang, X
dc.contributor.authorLi, X
dc.description.abstractZeno runs, where infinitely many actions occur within finite time, may arise in Timed Automata models. Zeno runs are not feasible in reality and must be pruned during system verification. Thus it is necessary to check whether a run is Zeno or not so as to avoid presenting Zeno runs as counterexamples during model checking. Existing approaches on non-Zenoness checking include either introducing an additional clock in the Timed Automata models or additional accepting states in the zone graphs. In addition, there are approaches proposed for alternative timed modeling languages, which could be generalized to Timed Automata. In this work, we investigate the problem of non-Zenoness checking in the context of model checking LTL properties, not only evaluating and comparing existing approaches but also proposing a new method. To have a systematic evaluation, we develop a software toolkit to support multiple non-Zenoness checking algorithms. The experimental results show the effectiveness of our newly proposed algorithm, and demonstrate the strengths and weaknesses of different approaches.
dc.publisherInstitute of Electrical and Electronics Engineers
dc.relation.ispartofjournalIEEE Transactions on Software Engineering
dc.subject.fieldofresearchSoftware engineering not elsewhere classified
dc.subject.fieldofresearchInformation systems
dc.titleA systematic study on explicit-state non-zenoness checking for timed automata
dc.typeJournal article
dc.type.descriptionC1 - Articles
dc.type.codeC - Journal Articles
gro.hasfulltextNo Full Text
gro.griffith.authorDong, Jin-Song

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