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dc.contributor.authorZhang, J
dc.contributor.authorLiu, Y
dc.contributor.authorAuguston, M
dc.contributor.authorSun, J
dc.contributor.authorDong, JS
dc.contributor.editorKarl R.P.H. Leung and Pornsiri Muenchaisri
dc.date.accessioned2018-06-26T06:46:50Z
dc.date.available2018-06-26T06:46:50Z
dc.date.issued2012
dc.identifier.isbn9780769549224
dc.identifier.issn1530-1362
dc.identifier.doi10.1109/APSEC.2012.60
dc.identifier.urihttp://hdl.handle.net/10072/184961
dc.description.abstractModeling and analyzing software architectures are useful for helping to understand the system structures and facilitate proper implementation of user requirements. Despite its importance in the software engineering practice, the lack of formal description and verification support hinders the development of quality architectural models. In this work, we develop an approach for modeling and verifying software architectures specified using Monterey Phoenix (MP) architecture description language. Firstly, we formalize the syntax and operational semantics for MP. This language is capable of modeling system and environment behaviors based on event traces, as well as supporting different architecture composition operations and views. Secondly, a dedicated model checker for MP is developed based on PAT verification framework. Finally, several case studies are presented to evaluate the usability and effectiveness of our approach.
dc.description.peerreviewedYes
dc.languageEnglish
dc.publisherIEEE
dc.publisher.placeUnited States of America
dc.relation.ispartofconferencenameAPSEC 2012
dc.relation.ispartofconferencetitleProceedings - Asia-Pacific Software Engineering Conference, APSEC
dc.relation.ispartofdatefrom2012-12-04
dc.relation.ispartofdateto2012-12-07
dc.relation.ispartoflocationHong Kong, P.R.China
dc.relation.ispartofpagefrom644
dc.relation.ispartofpageto653
dc.relation.ispartofedition1st
dc.relation.ispartofvolume1
dc.subject.fieldofresearchComputer Software not elsewhere classified
dc.subject.fieldofresearchcode080399
dc.titleUsing monterey phoenix to formalize and verify system architectures
dc.typeConference output
dc.type.descriptionE1 - Conferences
dc.type.codeE - Conference Publications
dc.description.versionAccepted Manuscript (AM)
gro.rights.copyright© 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
gro.hasfulltextFull Text
gro.griffith.authorDong, Jin-Song


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    Contains papers delivered by Griffith authors at national and international conferences.

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