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  • Arbitrary shape multilayer interconnects EMC modelling and optimization

    Author(s)
    Zhu, B
    Lu, J
    Zhu, M
    Jiang, M
    Griffith University Author(s)
    Lu, Junwei
    Year published
    2015
    Metadata
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    Abstract
    In very-large-scale-integration (VLSI), arbitrary structure of interconnections leads to unpredictable parasitic capacitance that generates EMC issues, i.e., parasitic noise, signal disorder, control failure, data asynchronous, etc. This paper investigates an EMC modelling and optimization method in calculating interconnect capacitance of VLSI interconnects based on the finite element method (FEM). Two- and three-dimensional interconnect models are simulated and the results of capacitance extraction are compared with experimental measurements, which proved the consistency and accuracy of FEM. Furthermore, optimizations of ...
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    In very-large-scale-integration (VLSI), arbitrary structure of interconnections leads to unpredictable parasitic capacitance that generates EMC issues, i.e., parasitic noise, signal disorder, control failure, data asynchronous, etc. This paper investigates an EMC modelling and optimization method in calculating interconnect capacitance of VLSI interconnects based on the finite element method (FEM). Two- and three-dimensional interconnect models are simulated and the results of capacitance extraction are compared with experimental measurements, which proved the consistency and accuracy of FEM. Furthermore, optimizations of coupling capacitance are applied on multilayer interconnection structures by the non-dominated sorting genetic algorithm II (NSGA-II).
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    Conference Title
    EMC Compo 2015 - 2015 10th International Workshop on the Electromagnetic Compatibility of Integrated Circuits
    DOI
    https://doi.org/10.1109/EMCCompo.2015.7358336
    Subject
    Electrical and Electronic Engineering not elsewhere classified
    Publication URI
    http://hdl.handle.net/10072/340670
    Collection
    • Conference outputs

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