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dc.contributor.advisorDimitrijev, Sima
dc.contributor.authorPande, Peyush
dc.date.accessioned2020-06-02T04:27:27Z
dc.date.available2020-06-02T04:27:27Z
dc.date.issued2020-05-18
dc.identifier.doi10.25904/1912/3560
dc.identifier.urihttp://hdl.handle.net/10072/394315
dc.description.abstractIn the recent years, SiC has become a popular material for power semiconductor devices, after decades long dominance of Si. SiC metal‒oxide‒semiconductor field-effect transistors (MOSFETs) are now commercially available and performing beyond the theoretical limits of Si MOSFETs, however, they are still far from the theoretical limits of SiC. One of the major issues in the commercial SiC MOSFETs is the low channel-carrier mobility, which is attributed to the high density of defects at or near the SiC/SiO2 interface. Consequently, it is necessary to characterize the SiC/SiO2 interface appropriately for the future development of SiC power devices. This thesis begins with a critical review of conventional characterization techniques for SiC metal‒oxide‒semiconductor (MOS) devices, which are directly adapted from techniques developed for Si. To address the challenges in characterizing SiC/SiO2 interface, a new characterization technique is proposed, which measures the effect of near-interface traps (NITs) in the strong-accumulation region of N-type SiC MOS capacitors. The technique measures the current through a SiC MOS capacitor in strong-accumulation and compares it to the trap-free current. With this technique, an active defect with energy levels localized between 0.13 eV to 0.23 eV, above the bottom of conduction band, is identified. As the effect of NITs is observed only at high frequencies, it is expected to be located very close to the SiC/SiO2 interface. To further investigate the effect of high temperature and positive bias stress on the identified NITs, the MOS capacitors are measured at high temperatures with positive bias stress. No significant difference is observed between measurements performed before and after high temperature bias stress. This led to the conclusion that the temperature independent tunneling is responsible for the trapping and de-trapping of channel electrons to and from the NITs. For the first time in this work we have demonstrated the NITs with response time in tens of ns. A detailed explanation of trapping/de-trapping mechanism of NITs, localized in energy, is also presented in this thesis. The developed technique is further used to perform a comparative analysis of NITs in as-grown and nitrided gate oxides. The density of NITs in nitrided gate oxide is localized in energy whereas it tends to decrease with increasing energy levels in as-grown gate oxide. It is experimentally shown that the nitridation helps to eliminate NITs further away from the SiC/SiO2 interface.
dc.languageEnglish
dc.language.isoen
dc.publisherGriffith University
dc.publisher.placeBrisbane
dc.subject.keywordsSiC
dc.subject.keywordsmetal‒oxide‒semiconductor
dc.titleCharacterization of Active Defects in SiC MOSFETs
dc.typeGriffith thesis
gro.rights.copyrightThe author owns the copyright in this thesis, unless stated otherwise.
gro.hasfulltextFull Text
dc.contributor.otheradvisorHan, Ji-Sheng
gro.identifier.gurtID000000022432
gro.thesis.degreelevelThesis (PhD Doctorate)
gro.thesis.degreeprogramDoctor of Philosophy (PhD)
gro.departmentSchool of Eng & Built Env
gro.griffith.authorPande, Peyush


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