Partial encryption of compressed images employing FPGA
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We present the realization of partial encryption of compressed images on an Altera FLEX10K FPGA device that allows for efficient hardware implementation. The compression algorithm decomposes images into several different parts. A secure encryption algorithm is then used to encrypt only the crucial parts, which are considerably smaller than the original image. This results in significant reduction in processing time and computational requirement for encryption and decryption. The breadth-first traversal linear lossless quadtree decomposition method is used for the partial compression and RSA is used for the encryption. Functional simulations are carried out to verify the functionality of the individual modules and the system on four different images. The comparisons, verification and analysis made validate the advantage of this approach. The design has utilized 2928 units of LC and a system frequency of 13.42 MHz.
Conference Proceedings. IEEE International Symposium on Circuits and Systems (ISCAS 2005)
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Electrical and Electronic Engineering not elsewhere classified