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dc.contributor.convenorIEEE Hong Kong Chapter
dc.contributor.authorEstivill-Castro, Vladimir
dc.contributor.authorHexel, Rene
dc.contributor.authorRosenblueth, David A
dc.contributor.editorLeung, KRPH
dc.contributor.editorMuenchaisri, P
dc.date.accessioned2017-05-03T14:16:10Z
dc.date.available2017-05-03T14:16:10Z
dc.date.issued2012
dc.date.modified2013-08-22T23:27:24Z
dc.identifier.isbn9780769549224
dc.identifier.issn1530-1362
dc.identifier.refurihttp://apsec2012.comp.polyu.edu.hk
dc.identifier.doi10.1109/APSEC.2012.21
dc.identifier.urihttp://hdl.handle.net/10072/51321
dc.description.abstractWe propose vectors of finite-state machines whose transitions are labeled by formulas of a common-sense logic as the modelling tool for embedded systems software. We have previously shown that this methodology is very efficient in producing succinct and clear models (e.g., in contrast to plain finite-state machines, Petri nets, or Behavior Trees).We show that we can capture requirements precisely and that we can simulate and validate the models. We can, therefore, directly apply Model- Driven Engineering and deploy the models into software for diverse platforms with full traceability of requirements. Moreover, the sequential semantics of our vector of finite-state machines enables model-checking, formally establishing the correctness of the model. Finally, our approach facilitates systematic Failure Modes and Effects Analysis (FMEA) for diverse target platforms. We demonstrate the effectiveness of our methodology with several examples widely discussed in the software engineering literature and compare this with other approaches, showing that we can prove more properties, and that some claims about verification in such approaches have been exaggerated or are incomplete.
dc.description.peerreviewedYes
dc.description.publicationstatusYes
dc.format.extent264500 bytes
dc.format.mimetypeapplication/pdf
dc.languageEnglish
dc.language.isoeng
dc.publisherIEEE
dc.publisher.placeUnited States of America
dc.relation.ispartofstudentpublicationN
dc.relation.ispartofconferencename19th Asia-Pacific Software Engineering Conference (APSEC)
dc.relation.ispartofconferencetitle2012 19TH ASIA-PACIFIC SOFTWARE ENGINEERING CONFERENCE (APSEC), VOL 1
dc.relation.ispartofdatefrom2012-12-04
dc.relation.ispartofdateto2012-12-07
dc.relation.ispartoflocationHong Kong, PEOPLES R CHINA
dc.relation.ispartofpagefrom428
dc.relation.ispartofpagefrom6 pages
dc.relation.ispartofpageto433
dc.relation.ispartofpageto6 pages
dc.relation.ispartofedition1st
dc.relation.ispartofvolume1
dc.rights.retentionY
dc.subject.fieldofresearchSoftware Engineering
dc.subject.fieldofresearchcode080309
dc.titleEfficient Modelling of Embedded Software Systems and Their Formal Verification
dc.typeConference output
dc.type.descriptionE1 - Conferences
dc.type.codeE - Conference Publications
gro.facultyGriffith Sciences, School of Information and Communication Technology
gro.rights.copyright© 2012 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
gro.date.issued2012
gro.hasfulltextFull Text
gro.griffith.authorHexel, Rene


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