Microprobing the Mechanical Effects of Varying Dielectric Porosity in Advanced Interconnect Structures

Abstract

Chip-package interaction has become a major concern due to increasingly porous low-K dielectrics. During the packaging process, shear stresses are exerted on fragile interconnect structures. We use a microprobe metrology system to experimentally measure how interconnect stacks with different dielectric porosities behave under various shear loading conditions and a wide range of temperatures.