Implementing Template Matching Logic in a Standard Flash Memory Cell
Current research into classification methods is almost exclusively software based, resulting in systems that perform well but are invariably slow when faced with large databases. The goal is therefore to create a hardware classification system that is much faster. In this paper, we introduce the concept of template matching logic and propose the use of a standard flash memory cell array to perform bit by bit template matching. The proposed system is based on a novel architecture that is unique and separate from existing architectures that make use of flash memory cell arrays. Verification is achieved by speech recognition simulations on the TIMIT database. Simulations of the system show results of 94.5 % recognition accuracy on clean words and 88.0 % recognition accuracy on test words with a signal-to-noise ratio of 5 dB. The results compare favorably to similar isolated word recognition tasks performed with software based methods.
Facta Universitatis. Series Electronics and Energetics
Microelectronics and Integrated Circuits