Comparison of Commercial Planar and Trench SiC MOSFETs by Electrical Characterization of Performance-Degrading Near-Interface Traps
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Dimitrijev, Sima
Haasmann, Daniel
Moghadam, Hamid Amini
Pande, Peyush
Jadli, Utkarsh
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Abstract
The suboptimal performance and low channel-carrier mobility of silicon carbide (SiC) power MOSFETs are attributed to a high density of oxide traps near the 4H-SiC/SiO 2 interface. In this article, a commercial 1200-V SiC trench MOSFET has been compared with a planar MOSFET obtained from the same manufacturer. We employed a newly developed integrated-charge method to quantify the near-interface traps (NITs). The results reveal that, at operating gate voltages, 15% of the total channel electrons were trapped for longer than 500 ns in the planar MOSFET compared to 9% in the trench MOSFET.
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IEEE Transactions on Electron Devices
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© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
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Nanotechnology
Power electronics
Microelectronics
Industrial electronics
Compound semiconductors
Engineering
Electrical engineering
Nanoscale characterisation
Electronics, sensors and digital hardware
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Chaturvedi, M; Dimitrijev, S; Haasmann, D; Moghadam, HA; Pande, P; Jadli, U, Comparison of Commercial Planar and Trench SiC MOSFETs by Electrical Characterization of Performance-Degrading Near-Interface Traps, IEEE Transactions on Electron Devices, 2022