A Method for Selection of Power MOSFETs to Minimize Power Dissipation
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Mohd-Yasin, Faisal
Moghadam, Hamid Amini
Pande, Peyush
Chaturvedi, Mayank
Dimitrijev, Sima
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Abstract
A balance between static and dynamic losses of a power MOSFET is always desirable for accomplishing the maximum efficiency for a specific power converter. The standard semiconductor theory suggests that a minimum power dissipation in a MOSFET can be achieved by selecting a specific device active area. However, for power circuit designers, the active device area is unknown given that only datasheet parameters are available. Hence, in this paper, we propose a simple method, based on semiconductor theory, to select optimum power MOSFET from a family of MOSFETs using only datasheet parameters. By applying this optimization method to the specific power supply circuit under development, power engineers can select the best transistors to yield lowest power losses for the systems under development.
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Electronics
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10
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17
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© 2021 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https:// creativecommons.org/licenses/by/ 4.0/), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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Nanotechnology
Electrical engineering
Engineering
Industrial electronics
Microelectronics
Compound semiconductors
Power electronics
Electronics, sensors and digital hardware
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Jadli, U; Mohd-Yasin, F; Moghadam, HA; Pande, P; Chaturvedi, M; Dimitrijev, S, A Method for Selection of Power MOSFETs to Minimize Power Dissipation, Electronics, 10 (17), pp. 2150