Transmission Line Model (TLM) networks are commonly used to model planar metal-semiconductor ohmic contacts. Multiple layer contacts such as non-alloyed n+n, heterojunction and metal-silicide-silicon contacts can also be analyzed using a Tri-Layer TLM (TLTLM) network. In this article, two and three layer contact structures are combined using the appropriate TLM models in order to electrically model the gate-drain/source extension and drain/source contact region of a MOSFET. Important device properties such as contact and parasitic resistance can thus be derived for various device structures in terms of the geometrical and material parameters used in the TLM model. The developed model is used to give an example calculation of the parasitic resistance in the gate-drain extension and the resistance of the ohmic contact.