This paper presents a technique to optimize with constraints, the performance of three-degree of freedom silicon accelerometers. A flexure configuration has been proposed in order to meet requirements of small cross-axial acceleration, high and linear sensitivity. The overall chip dimension is 1.5ױ.5װ.5 mm3 (Lחה) and the beam size is 950׸0ױ0 孳 (Lחה). The purpose of this constrained optimization process is to achieve the highest sensitivity or resolution while imposing conditions on other parameters. It has been done based on considerations of the junction depth, the doping concentration of the piezoresistor, the temperature, the Signal to Noise Ratio, and the power consumption. Such an optimized accelerometer offers a much better performance compared to others.