Voltage controlled memristor threshold logic gates

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Maan, Akshay
James, Alex Pappachen
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2016
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Jeju, South Korea

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In this paper, we present a resistive switching memristor cell for implementing universal logic gates. The cell has a weighted control input whose resistance is set based on a control signal that generalizes the operational regime from NAND to NOR functionality. We further show how threshold logic in the voltage-controlled resistive cell can be used to implement a XOR logic. Building on the same principle we implement a half adder and a 4-bit CLA (Carry Look-ahead Adder) and show that in comparison with CMOS-only logic, the proposed system shows significant improvements in terms of device area, power dissipation and leakage power.

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2016 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)

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Electrical and Electronic Engineering not elsewhere classified

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