Design optimization for an SOI MOEMS accelerometer

No Thumbnail Available
File version
Author(s)
Teo, Adrian JT
Li, Holden King-Ho
Tan, Say Hwa
Yoon, Yong-Jin
Griffith University Author(s)
Primary Supervisor
Other Supervisors
Editor(s)
Date
2018
Size
File type(s)
Location
License
Abstract

With optimization being vital, the design optimization of a silicon-on-insulator (SOI) micro-opto-electro-mechanical systems accelerometer is discussed in this paper. This process has enabled a simplistic design that employs double-sided deep reactive ion etching (DRIE) on SOI wafer to be able to attain high sensitivity of 294 µW/G with a calculated proof mass displacement of 0.066 µm/G which was close to ANSYS simulated results of 0.061 µm/G. Optimization has also enabled an in-depth study of the effects of the different variables on the overall performance of the device.

Journal Title
Microsystem Technologies
Conference Title
Book Title
Edition
Volume
Issue
Thesis Type
Degree Program
School
Publisher link
Patent number
Funder(s)
Grant identifier(s)
Rights Statement
Rights Statement
Item Access Status
Note
Access the data
Related item(s)
Subject
Communications engineering
Nanotechnology
Nanotechnology not elsewhere classified
Persistent link to this record
Citation
Collections